Test Date: TBD
Items to bring:
– USC I.D. (passport or Driver’s license is sufficient)
– Pencil with an eraser (no sharing of erasers)
– No calculators will be allowed
– Scratch paper will be provided for you
**All exams are 50-60 minutes and will begin promptly at the designated start time**
|9:15am – 10:15am|
|9:15am – 10:15am|
|9:15am – 10:15am||EE 559|
|10:30 – 11:30am|
|10:30 – 11:30am|
Please Note: If you would like to take more than one exam but they are scheduled at the same time, please come to an earlier or later exam time to take the additional exam, as no make up exams will be given. You will be able to login to http://myviterbi.usc.edu and view your results the following week. Once you have passed the necessary placement tests for a course, you will be able to register for that course for any future semester. Passing a placement exam fulfills pre-reqs for taking graduate classes, but it does not automaticaly satisfy course requirements for specific degree programs, if any.
EE 450: Introduction to Computer Networks
- Computer Networks by Peterson
- Data & Computer Communication by Stallings
- Computer Networks by Tannenbaum
- Communications networks and services, classifications of networks, performance measures such as Throughput and Delay. The public Internet and PSTN. Convergence of services. Networking topologies.
- Network layered architecture, protocols and interfaces. OSI model, TCP/IP model, two- and three-tier client-server models, peer-process communications
- Data communications: Analog and digital signaling, sampling theorem, data and signaling rates, modems, time division and statistical multiplexing, link capacity, transmission media, line coding.
- Link layer Procedures: Error detection and control, flow control, sliding window procedures. Examples of link protocols including PPP and HDLC.
- Local Area Networks: Ethernet, Token rings and wireless LANs. Media access control procedures, CSMA/CD, Token Passing and CSMA/CA. Shared vs. switched LANs. LAN hardware and software components. LAN performance analysis
- TCP/IP and the Internet: The Internet Protocol, packet format, IP addressing and subnetting, fragmentation and re-assembly, address resolution protocol, routing and forwarding tables, routing algorithms (RIP, OSPF and BGP), transport layer protocols, TCP and UDP, connection establishment, end-to-end flow and error control procedures, advertised windows, slow-start, long-fat networks, congestion control, port and socket addressing, etc…
To view an online module of EE-450 concepts please click on the following link: http://gapp.usc.edu/students/current/student-resources/workshops-tutorials
EE457: Computer Systems Organization
- Computer Organization & Design – The Hardware and Software Interface (2nd edition) by D. A. Patterson (Berkeley) and J. L. Hennessey (Stanford)
- EE102L review: Basic digital system design — Datapath unit design and Control unit design
- Basic concepts of assembly language, unsigned and signed numbers, Booth’s multiplication and restoring and non-restoring division algorithms.
- CPU performance: relation between execution time of a program and the CPU specs (instruction count, clocks per instruction, and clock period).
- Compare and contrast CISC and RISC instruction sets, simple ALU design, CLA (carry look-ahead adder), CSA (carry save adder) and application to multiplication.
- CPU design: Single cycle CPU design, multi-cycle CPU design, pipelined CPU design including dependencies, hazard detection, stalling, forwarding, branching, flushing, branch penalty due to flushing, branch delay slots.
- Memory and cache organization: fully associative, direct, and set associative mappings, cache TAG RAMs, and cache DATA RAMs, interleaved main memory to facilitate fast block transfer between main memory.
- Virtual memory: page tables (single-level, multi-level), TLBs, introduction to multiprocessors, cache coherency (MESI protocol).
EE 477: MOS VLSI Circuit Design
- Principles of CMOS VLSI Design by Weste and Eshroghian
- Analysis and design of digital MOS VLSI circuits including area, delay and power minimization. Laboratory assignments including design, layout, extraction, simulation and automatic synthesis.
- Static characteristics: structure and (V-I) characteristics of MOSFETs, operation as a switch (including weak values), example CMOS and pass transistor circuits, static characteristics of CMOS and pseudo-nMOS inverters.
- Layout preliminaries: Introduction to semiconductor processing, layout, and design rules.
- Parasitics and performance: Estimation of parasitics from layout, analytical as well as empirical delay models for gates, wires, and pass transistors. Estimation of power dissipation.
- Design of complementary CMOS, pass-transistor and dynamic logic circuits.
- Design optimizations: Preferred gate types for various logic styles; buffer design for high fan-out, buffering long wires; transistor level optimizations — body effect, charge sharing, diffusion capacitance minimization, and transistor sizing; custom layout optimization.
- Clocking; latch and flip-flop designs, clocking strategies.
To view an online module of EE-477 concepts please visit the following link: http://gapp.usc.edu/students/current/student-resources/workshops-tutorials
EE 479: Introduction to Integrated Circuit Design
- Analysis & Design of Analog Integrated Circuits, P. Grey, R. Meyer, et al., 4th Ed., John Wiley & Sons, 2001.
- Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw Hill, 2001.
Brief Syllabus (required material for the EE 536a placement exam)
- Active devices principles of operation and modeling
- Large signal and small signal models for MOS and BJT
- Single- and multi-stage transistor level amplifier design
- Common source/emitter, common gate/base, source/emitter follower, cascode, etc.
- Differential circuits
- Differential pairs, common-mode and differential-mode analysis, half circuit concept, etc.
- Current mirrors and active loads
- Biasing and voltage/current references
- Voltage and temperature insensitive biasing, etc.
- Frequency response of amplifiers
- Dominant pole, open circuit time constant analysis, short circuit time constant analysis, associating poles to nodes, etc.
- Noise in integrated circuits
- Noise models in passive and active devices, circuit noise analysis, input referred noise sources, etc.
- Basic concepts, circuit feedback models, etc.
- Frequency response and stability of feedback amplifiers
Note 1. In addition to the aforementioned syllabus, prospective EE 536a students are expected to have complete knowledge of EE 348L and EE 202 material.
Note 2. Students who don’t pass the EE 479 placement exam, should enroll in EE 479. A minimum letter grade of “B” in EE 479 is required to allow for EE 536a registration without another placement exam. Students who pass EE 479 with a letter grade lower than “B” must pass the EE 479 placement exam as well.